Noobs Guide To Digital (NES / Famicom) – Part 1

A rather long video where I try to explain (badly) the basics of digital electronics and in particular how the NES / Famicom CPU works.

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There are some mistakes in there –
1) I refer to hblank when I really should have said vblank. A vblank occurs after the last scanline of the screen has been drawn. The hblank occurs at the end of each scanline drawn and the PPU returns to the top of the screen to start from the top again. There are also a couple of other minor mistakes and perhaps didn’t go into enough detail in places.

2) At the point where I do the logic analyzer capture – that extra 0x00 on the data bus is the READ of address 2002, not a write – which matches what we saw when stepping through in the emulator.

3) Something else to point out – the NES CPU could be CMOS I think – something I’ve never thought about. I do know that many of the older 6502 CPUs are CMOS. But the principles are the same in general.

4) This video was meant to be an overview – not a comprehensive guide. For example, I only talk briefly about the address and data lines – no reference to chip select or any other control signals. Where I refer to RAM, in this particular example we are only looking at SRAM as its is quite simple compared to DRAM.

5) I also do not explain the different addressing modes of the 6502 but rather just try to show operation and refer to a couple of the different address modes. The full list of opcodes is not shown – you may want to go away and look at that too. If there’s something you don’t understand, or if you spot mistakes (there are a few) – please just let me know!

6) I totally skipped over explaing bits, nibbles, bytes and words – something for further study if you are not familiar.

7) And when using the logic analyzer I could have put a trigger there on the CS / OE line that leads to the cart ROM! That would have been a good way to capture only ROM reads.

8) F in hex is 15, not 16 lol. Doh! 0-15 0-F.

9) Additional corrections by RefractionPCSX2:- Decimal mode not on NES although the Status bit exists, possibly BRK too, can’t remember 23:40 Accumilator not used in all math calculations (made it sound a bit like that) at 28:15
1000-1fff in memory also mirrors the ram area, it’s mirrored 4 times 44:05 Should have explained that the value FB in the branch is a negative number (not sure if all branches use a signed number, can’t remember!)

10) Kris Bleakley pointed out – The crap at the start of the data bus capture is the CPU processing the Reset Interrupt (the program counter and flags pushed onto the stack plus the reading of the reset vector). The data won’t actually be written to the stack as the write pin is held high during reset.

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